Edaptive Computing, Inc.
1245-G Lyons Road
Dayton, OH 45458
Communications Digital Design Engineer
The Communication Digital Design Engineer will lead the Edaptive Hardware Team in the research, requirements development, design, analysis, and implementation of high rate wireless communications modeling focused on network switching and routing interfaces. Extensive experience with current VHDL/FPGA vendors, tools and processes is a requirement, including VHDL coding along with testbench development. In this role the candidate will perform research, modeling, simulation and implementation of networking, communication, and computer architecture concepts and technologies. The candidate will participate in all VHDL/FPGA design lifecycle sub-processes, including: specification, architecture design, build, documentation and testing. The candidate will also perform research and implementation of advanced concepts, technologies, products, processes, and/or methods to help assist customers' achievement of operational objectives.
Full time with competitive benefits package
--Real 40 Hour work week.
--No nights or weekends.
--Friendly team environment.
--South Dayton location; close to I-675 and Dayton Mall.
BS/MSEE, BS/MSCE, BS/MSECE
Minimum of 6 years direct experience.
Required Skills and Abilities:
Working knowledge of complex high performance VHDL designs and verification test benches.
Strong background in networking specifically the Layer 2 Data Link and Layer 3 Network.
Experience with various EDA verification tools like ModelSim or ActiveHDL.
Experience managing complex digital designs preferably in a multiple-engineer team setting.
Desired Skills and Abilities:
Familiarity with common networking/communication protocols like Ethernet, Internet Protocol, TCP/IP, UDP, VLAN, ARP, PING, InARP, ICMPv6, RIPv2, OSPFv2, BGP, PIM, DHCP, MLD, and Multi-cast.
Experience in FPGA Centric Algorithm Development, Matlab, and Digital Signal Processing that can be translated into low-level designs.
Experience using VHDL design targeted to Altera, Xilinx, or Actel FPGAs along with design verification.
Experience with embedded hard core processors in FPGA fabric like the Xilinx Virtex7 Zynq family.
Experience with various bus standards and protocols like RS-232/485, I2C, SPI, PCI/PCI3, ATA/SATA.
Working knowledge of computer architecture and operating systems.
Experience in Cybersecurity for DoD systems.
Active U.S. Security Clearance.
Submission Instructions (Non-complying submissions will not be considered):
Reference Communications Digital Design Engineer in all correspondence.
Eligibility for a Security Clearance is required.
Resumes must be 3 pages or less and provide description of how qualifying technologies were used. You may also submit a one page cover letter (optional but desired) stating your career objectives and how your qualifications and interest align with our requirements.
You must complete the applicant profile by clicking Apply Here at the bottom of the page. The process for submitting all information is not complete until you hit the submit button.
If you are interested in being considered for employment at Edaptive Computing Inc., you need to apply on-line using our electronic application. If, due to a disability, you need assistance in completing the on-line application, contact the Edaptive's Human Resources Department at (937) 433 - 0477. Please indicate the specific assistance needed. Note: This option is reserved for those with disabilities only.